Caller ID data-reporting mechanism for electronic devices and associated methods

ABSTRACT

Caller ID (CID) data-reporting circuitry operates in conjunction with direct-access arrangement (DAA) circuitry or other circuitry that operates within the operational requirements of the Audio Codec &#39;97 (AC-97) Component Specification. The CID data-reporting circuitry provides for the transfer of a data word from the DAA circuitry to a host computer or controller that operates within the AC-97 operational specifications. The CID data-reporting circuitry transfers the CID data in an asynchronous manner, i.e., at non-pre-determined intervals. Software running on the host computer or the controller may thus examine each data word or group of data words and take appropriate action, for example, process the data further or terminate the data transfer. A command interpreter begins the data transfer by initializing an address pointer used to facilitate retrieving the data from a CID random-access memory (RAM) and to make the data available to the host computer or controller through an output register.

TECHNICAL FIELD OF THE INVENTION

[0001] This invention relates to reporting Caller ID (CID) data toelectronic devices and, more particularly, to reporting CID data tocontrollers and computer systems meeting operational features of theAudio Codec '97 Component Specifications.

BACKGROUND

[0002] To provide a standard interface for computer system audioapplications, Intel Corporation has sponsored the Audio Codec '97(AC-97) Component Specification. Note that, as used herein, AC-97operational specifications include the current AC-97 operationalspecifications and any revisions or updates to those specifications, aswell as any follow-on specifications that incorporate features of thecurrent AC-97 operational specifications. The Audio CODEC '97 ComponentSpecification (AC97), revision 2.1 (May 22, 1998) is hereby incorporatedby reference in its entirety. The AC-97 specifications enable acontroller to communicate with a variety of devices. Some of thesedevices may use or operate on Caller ID (CID) data provided by thetelephone company. CID data typically provides information about theidentity of a calling party, the telephone number of the calling party,the time of the call, etc.

[0003] The AC-97 specifications provide a means of reporting the CIDdata, typically up to 256 characters (1 byte each) over a serial link.To do so, a software program must invoke a channel buffer of an AC-97host computer. Using the channel buffer in this manner, however, hasseveral disadvantages. First, the software program has no way ofdetermining the size of the buffer before reporting of the CID datacommences. Thus, the software program must allocate the largest sizepossible. Second, the reporting of the CID data can take a long time.Because the software program has no way of knowing the contents of theCID data, it must allow for the transmission of the entire data set,even though it may need only the first few bytes of data. Third, thedata have an indeterminate address within the buffer because of thetiming of their arrival. The unknown timing of the arrival of the firstword of data from the buffer after the allocation of buffer space andsubsequent enabling of data storage in the buffer results inindeterminate address for the first data word. Put another way, becausethe buffer receives the data words sequentially, the data block as awhole has an indeterminate offset address within the buffer. As aresult, the software program must perform additional procedures toidentify the offset address within the buffer. Typically, the softwareprogram must search the entire data block for specific words or groupsof words, for example special codes identifying data headers. Poorreception resulting in bit errors in the received data, however, maycause the search to produce erroneous results that would require furtherprocessing to avoid reporting incorrect CID data to the end user. TheAC-97 specifications fail to provide any mechanisms or features tocombat these problems.

SUMMARY OF THE INVENTION

[0004] This invention provides Caller ID (CID) data-reporting apparatusand associated methods for solving the disadvantages of receiving CIDdata through AC-97 channel buffers. CID data-reporting circuitryaccording to the invention reports Caller ID data by using the AC-97status and control channels and without using the AC-97 audio channels.

[0005] In one embodiment, the invention constitutesdirect-access-arrangement (DAA) circuitry including interface circuitryconfigured to operate within the AC-97 operational specifications. Theinterface circuitry receives input data and provides output data. Thedirect-access-arrangement circuitry also includes Caller ID datacircuitry coupled to the interface circuitry. The Caller IDdata-reporting circuitry provides Caller ID data to the interfacecircuitry asynchronously. More specifically, the Caller IDdata-reporting circuitry provides the Caller ID data in one-wordincrements at non-pre-determined intervals.

[0006] In another embodiment, the invention constitutes an integratedcircuit device configured to operate within the AC-97 operationalspecifications. The integrated circuit device includes interfacecircuitry configured to operate within the AC-97 operationalspecifications. The interface circuitry receives input data and providesoutput data. The integrated circuit device also includes Caller ID datacircuitry coupled to the interface circuitry. The Caller IDdata-reporting circuitry provides Caller ID data to the interfacecircuitry asynchronously in one-word increments. More specifically, theCaller ID data-reporting circuitry provides the Caller ID data atnon-pre-determined intervals.

[0007] In yet another embodiment, the invention constitutes a computersystem that includes direct-access-arrangement circuitry for couplingthe computer system to data lines. The computer system includes aprocessor configured to process data and to decode and processinstructions; a controller, coupled to the processor, and configured tooperate within the AC-97 operational specifications;direct-access-arrangement circuitry, coupled to the controller, andconfigured to operate within the AC-97 operational specifications; andCaller ID data-reporting circuitry coupled to thedirect-access-arrangement circuitry. The Caller ID data-reportingcircuitry provides Caller ID data to the direct-access-arrangementcircuitry asynchronously in one-word increments. Thedirect-access-arrangement circuitry communicates with the controller.More specifically, the Caller ID data-reporting circuitry provides theCaller ID data at non-predetermined intervals.

[0008] In an alternative embodiment, the invention constitutes acomputer system that includes circuitry configured to operate within theAC-97 operational specifications. The computer system includes acontroller configured to operate within the AC-97 operationalspecifications; an integrated circuit device coupled to the controller,and Caller ID data-reporting circuitry within the integrated circuitdevice. The integrated circuit device operates within the AC-97operational specifications and communicates with the controller. TheCaller ID data-reporting circuitry receives Caller ID data and providesCaller ID data to the controller asynchronously. More specifically, theCaller ID data-reporting circuitry provides the Caller ID data inone-word increments at non-pre-determined intervals.

[0009] In another aspect, the invention constitutes a method forreporting Caller ID data in a computer system. The method includesproviding a host processor configured to process data and to decode andprocess instructions, and providing direct-access-arrangement circuitryconfigured to operate within the AC-97 operational specifications. Thedirect-access-arrangement circuitry includes Caller ID data-reportingcircuitry that provides Caller ID data asynchronously in one-wordincrements. The method further includes receiving Caller ID data in theCaller ID data-reporting circuitry and providing the Caller ID data tothe host processor. More specifically, the Caller ID data-reportingcircuitry provides the Caller ID data to the device atnon-pre-determined intervals.

[0010] In another embodiment, the invention constitutes a method forreporting Caller ID data. The method includes providingdirect-access-arrangement circuitry that operates within the AC-97operational specifications. The direct-access-arrangement circuitryincludes Caller ID data-reporting circuitry that receives Caller ID andprovides Caller ID asynchronously. The method further includes receivingCaller ID data in the Caller ID data-reporting circuitry and providingthe Caller ID data to a device. The device may comprise a host processoror a controller. More specifically, the Caller ID data-reportingcircuitry provides the Caller ID data in one-word increments atnon-pre-determined intervals.

DESCRIPTION OF THE DRAWINGS

[0011] The appended drawings illustrate only exemplary embodiments ofthe invention and therefore do not limit its scope, because theinventive concepts lend themselves to other equally effectiveembodiments.

[0012]FIG. 1 illustrates a block diagram of a line-interface controllerthat includes line-side direct-access-arrangement (DAA) circuitry andhost-side direct-access-arrangement circuitry that includes Caller ID(CID) data-reporting circuitry according to the invention.

[0013]FIG. 2 shows a block diagram of a computer system that comprisesan AC-97 controller and a line-interface controller that includes CIDdata-reporting circuitry according to the invention.

[0014]FIG. 3 illustrates a more detailed embodiment of the CIDdata-reporting circuitry according to the invention for providing CIDdata to a host computer or controller that operates within the AC-97operational requirements.

DETAILED DESCRIPTION OF THE INVENTION

[0015] This invention contemplates direct-access arrangement (DAA)circuitry that includes Caller ID (CID) data-reporting circuitry forproviding CID data to a host or controller. In particular, the inventionrelates to providing CID data to a host computer or controller thatoperates within the AC-97 operational requirements (i.e., is AC-97compliant). By incorporating the CID data-reporting circuitry, DAAcircuitry according to this invention provides a solution to theproblems of inefficient use of hardware and software resourcesassociated with invoking AC-97 channel buffers to locate and extract CIDdata.

[0016] A software program residing on an AC-97 host computer orcontroller operates in conjunction with the CID data-reporting circuitryaccording to the invention. The software program sends commands to theCID data-reporting circuitry. In response, the CID data-reportingcircuitry provides CID data to the AC-97 controller or host computersequentially over a link between the DAA circuitry and the AC-97controller or host computer, known as the AC link. The CIDdata-reporting circuitry according to the invention provides the CIDdata to the AC-97 controller or host computer over the AC-link one wordor byte at a time.

[0017] The data-reporting cycle begins with the initialization of anaddress pointer. The address pointer points to the location of the CIDdata in a buffer or memory. Data-read cycles follow the initializationof the address pointer. Each read cycle returns the data word at thelocation in the buffer corresponding to the current value of the addresspointer. The read cycle also post-increments the address pointer,preparing it for the next read cycle. Repeating this cycle allows thereporting of CID data one word at a time.

[0018] The CID data-reporting mechanism according to the inventionaccomplishes the desired CID data reporting task without using the AC-97audio channels. A CID data-reporting mechanism that uses the AC-97 audiochannels typically uses the AC-97 audio time-slots 5 or 10. That mannerof operation places restrictions on the software supervising the CIDdata-reporting operation by requiring it to receive all of the datawords over the audio channel of the AC-97. The mechanism for reportingCID data using AC-97 audio channels reports the data at pre-determinedintervals and at a constant transfer rate (although the time periodbetween the transfers may not be constant). Put another way, themechanism for reporting CID data over the AC-97 audio channel deliversthe data isochronously.

[0019] In contrast, the CID data-reporting mechanism according to thisinvention accesses the CID data through the AC-97 status and controlchannel, i.e., time-slots 1 and 2 of the AC-97 data frame. The CIDdata-reporting mechanism according to the invention reports the CID datain non-pre-determined intervals in response to requests of an externaldevice. Thus, unlike a mechanism using the AC-97 audio channel, the CIDdata-reporting mechanism according to this invention reports the CIDdata asynchronously.

[0020] The CID data-reporting mechanism according to the invention hasseveral advantages. First, by writing the initial value of the addresspointer to access the buffer or memory, the data-reporting mechanismavoids a subsequent need for searching through the data to locate thedata word at the beginning of a block of CID data. Thus, theinitialization of the address pointer overcomes one disadvantage ofinvoking the AC-97 channel buffers, mentioned above.

[0021] Second, the CID data-reporting circuitry according to theinvention enables the software program to allocate AC-97 buffer spaceefficiently and dynamically. The software program can search for thedata header word (i.e., a word or collection of words marking thebeginning of a block of CID data) as it receives each word. Thus, thesoftware need not search the entire buffer space to locate the headerword or words. Because the CID data-reporting circuitry reports CID datato the AC-97 host processor or controller one word at a time, thesoftware program can allocate only the necessary amount of buffer space,rather than allocating the maximum amount. The software program may doso by examining a header word, for example, a word indicating the sizeof the CID data block, or a group of words, and allocate buffer spaceaccordingly.

[0022] Third, CID data-reporting circuitry according to the inventionallows a software program running on an AC-97-compliant host processoror controller to terminate the data-reporting cycle at any time.Specifically, the software program can examine the CID data word byword, as it receives each word from the CID data-reporting circuitry. Inthis manner, the software program can efficiently and quickly search fora data word or group of data words marking the end of the desired CIDdata block. Upon reaching the end of the CID data block, the softwareprogram can terminate the process without any further need to examine orprocess the contents of the buffer to locate the end of the data block.Moreover, the software program can take immediate steps without awaitingthe end of the data transfer. As it receives the CID data word by word,the software program can examine each data word after receiving it andtake intermediate processing or computation steps based on the value ofthe received word alone or in conjunction with the values of the wordsreceived previously. Finally, the software program can examine each dataword or a group of data words to determine its validity. Upon detectionof an invalid data word, the software program can take remedial measuresor abort further reception of the data, thus saving processing time.

[0023]FIG. 1 shows a block diagram for an embodiment 100 that includesCID data-reporting circuitry 130 according to the invention. A hostprocessor 102 couples to direct-access-arrangement (DAA) circuitry 112through a communication interface 110. The DAA circuitry 112 allows thehost processor 102 to communicate with tip (T) 118 and ring (R) 120 of atelephone line. The DAA circuitry 112 includes host-side DAA circuitry104, an isolation barrier 106, line-side DAA circuitry 108, andisolation communication interfaces 114 and 116. The host-side DAAcircuitry 104 and line-side DAA circuitry 108 may each reside within asingle integrated circuit. An exemplary description of such DAAcircuitry appears in U.S. Pat. No. 5,870,046, assigned to SiliconLaboratories, Inc. U.S. Pat. No. 5,870,046, as well as co-pendingapplication Ser. No. 09/035,175, entitled “Direct Digital AccessArrangement Circuitry and Method for Connecting Phone Lines,” alsoassigned to Silicon Laboratories, Inc., are hereby each incorporated byreference in their entireties. Alternatively, the host-side DAAcircuitry 104 and the line-side DAA circuitry 108 may reside within asingle integrated circuit.

[0024] In addition, each of the following U.S. patent applications,which are related in subject matter to the current application and arefiled concurrently herewith, is hereby incorporated by reference in itsentirety: Ser. No. ______, entitled “TELEPHONE RING-VALIDATION ANDWAKE-ON-RING CIRCUITRY AND ASSOCIATED METHODS” by Alan F. Hendrickson;Ser. No. ______, entitled “TELEPHONE HANG-UP TIMEOUT CIRCUITRY AND DATATIMEOUT CIRCUITRY FOR ELECTRONIC DEVICES AND ASSOCIATED METHODS” by AlanF. Hendrickson; Ser. No. ______, entitled “DATA-SECURITY CIRCUITRY FORELECTRONIC DEVICES AND ASSOCIATED METHODS” by Alan F. Hendrickson; andSer. No. ______, entitled “PROGRAMMABLE VENDOR IDENTIFICATION CIRCUITRYAND ASSOCIATED METHOD” by Alan F. Hendrickson and Robert C. Wagner.

[0025] The host-side DAA circuitry 104 incorporating CID data-reportingcircuitry 130 according to the invention can provide CID data to thehost processor 102 through the communication interface 110, one word ata time, as described above. The DAA circuitry 112 includes at least oneCID data-reporting circuitry 130. A software program 140 on the hostprocessor processes the CID data received through the communicationinterface 110. The software program 140 may take various actionsdepending on the value of each received data word or depending on thevalues of a group of received data words, as described above. Theseactions may include processing steps or taking remedial measures if thesoftware program receives invalid or erroneous data. The host-side DAAcircuitry 104 may take the form of an integrated-circuit. In such aconfiguration, the CID data-reporting circuitry 130 may reside withinthe integrated-circuit containing the host-side DAA circuitry 104.Alternatively, the CID data-reporting circuitry 130 may reside outsidethe integrated-circuit that contains the host-side DAA circuitry 104 andcommunicate with it through one or more signal lines. The CIDdata-reporting circuitry 130 according to this invention accesses theCID data through the AC-97 status and control channel, i.e., time-slots1 and 2 of the AC-97 data frame. The CID data-reporting circuitry 130reports the CID data asynchronously, i.e., in non-pre-determinedintervals. Thus, the CID data-reporting circuitry 130 places noreal-time constraints on the software program 140.

[0026] The present invention proves particularly useful where the hostprocessor 102 at least in part comprises a controller configured tooperate within the AC-97 operational specifications, and the circuitryinterfacing with the telephone line also operates within the AC-97operational specifications. FIG. 2 shows a block diagram of anembodiment directed to an AC-97 application. An embodiment 200 accordingto the invention includes a central processing unit (CPU) 218. The CPU218 may couple to one or more other devices through interfaces or buses210, 212, 214, 216, and 217. As persons skilled in the art willappreciate, a single bus or interface may couple the CPU 218 to variousdevices in the computer system 200. For example, the CPU 218 may coupleto one or more input devices 202, memory devices 204, storage devices206, video/display devices 208, and audio devices 209.

[0027] Furthermore, the CPU 218 may couple to an AC-97 controller 220configured to operate within the AC-97 operational specifications. TheAC-97 controller may reside within a separate block, as shown as in FIG.2. Alternatively, the AC-97 controller 220 or its functionality mayreside in any other suitable location, including within the CPU 218. TheCPU 218 and the AC-97 controller 220 may, together or individually, formthe host processor 102 in FIG. 1, as desired. The software program 140may run on the CPU 218, the AC-97 controller 220, or both, depending onthe particular application.

[0028] The AC-97 controller 220 couples to AC-97 interface circuitry 201through an interface 240. The signal lines forming the interface 240 maybe a subset or all of the signal lines forming the interface 110 shownin FIG. 1. Similar to the AC-97 controller 220, the AC-97 interfacecircuitry 201 also operates within the AC-97 operational specifications.The AC-97 controller 220 allows the host processor 102 to communicatewith tip (T) 118 and ring (R) 120 of a telephone line. According to thepresent invention, the AC-97 interface circuitry 201 may include atleast one CID data-reporting circuitry 130. The CID data-reportingcircuitry 130 provides CID data to the host processor 102 through theinterface 240. The software program 140 operates in conjunction with theCID data-reporting circuitry 130, as described above. The softwareprogram 140 receives CID data from the AC-97 controller 220 throughinterface 240. Alternatively, the software program 140 may receive CIDdata from the CPU 218 or one or more of the devices 202, 204, 206, 208,and 209. As noted above, the CID data-reporting circuitry 130 accordingto this invention accesses the CID data through the AC-97 status andcontrol channel, i.e., time-slots 1 and 2 of the AC-97 data frame. TheCID data-reporting circuitry 130 reports the CID data asynchronously,i.e., in non-pre-determined intervals. Thus, the CID data-reportingcircuitry 130 places no real-time constraints on the software program140.

[0029]FIG. 3 illustrates a more detailed block diagram of an embodiment300 of CID data-reporting circuitry according to the invention. The CIDdata-reporting circuitry in FIG. 3 comprises a command interpreter 302,an address generator 304, CID random-access memory (RAM) 306, and anoutput register 308. The CID data-reporting circuitry operates asfollows: The command interpreter 302 has a command input 316. Thecommand interpreter 302 receives a command from a software program,e.g., the software program 140 in FIG. 1 or FIG. 2, through its commandinput 316. Referring back to FIG. 3, upon receiving the command, thecommand interpreter 302 decodes it to determine the operations it mustundertake in response to the command. Note that the command interpretermay receive and interpret commands other than those relating to thereporting of CID data.

[0030] The command interpreter 302 also includes an initialize output320 and a read output 324. As described below, the read output 324facilitates reading of CID data and reporting the data to a hostprocessor or controller, as shown in FIG. 1 or FIG. 2. The initializeoutput 320 causes the address generator 304 to initialize an addresspointer 326 to a known value, typically the starting address of the CIDdata residing within the CID RAM 306. As noted above, the CIDdata-reporting mechanism according to this invention uses the AC-97status and control channel, i.e., AC-97 time-slots 1 and 2. The commandinterpreter 302 provides its initialize output 320 and its read output324 by decoding time-slots 0, 1, and 2 of the AC-97 data frames.Time-slot 0 determines which other time-slots contain valid data.Time-slots 1 and 2 constitute status and control channels.

[0031] In a preferred embodiment of the invention, writing to theregisters in the AC-97 address space controls the operation of the CIDdata-reporting circuitry. Specifically, writing to register 74hexadecimal causes the command interpreter 302 to provide the initializeoutput 320 to the address generator 304. Reading register 74 hexadecimalcauses the command interpreter 302 to provide the read output 324 to theaddress generator 304 and to the output register 308. The initializeoutput 320 and the read output 324 control the operation of the addressgenerator 304, the CID RAM 306, and the output register 308.

[0032] The address generator 304 provides the value of the addresspointer 326 to the CID RAM 306 through the address output 328 of theaddress generator 304. In response, the CID RAM 306 reads the data wordresiding at the address specified by the address output 328 and makesthe data word available at a data output 332 of the CID RAM 306. Thedata output 332 of the CID RAM 306 typically is one word wide and drivesdata inputs of the output register 308. Output lines 350 of the outputregister 308 provide the CID data to follow-on circuitry, for example,one of more of a DAA circuitry, a host processor, or a controller, whichpreferably operates within the AC-97 operational specifications.

[0033] The read output 324 of the command interpreter 302 serves a dualpurpose in the embodiment shown in FIG. 3. The read output 324 enablesthe output lines 350 of the output register 308 and makes the CID dataavailable at the output lines 350, as described above. The read output324 of the command interpreter 302 also causes the address generator 304to increment the address pointer 326, thus preparing the addressgenerator 304 for another data-read cycle. Put another way, the readoutput 324 causes the post-incrementing of the address pointer 326.Alternatively, one may alter the circuitry in FIG. 3 so that the readoutput 324 pre-increments the address pointer 326. Such an alteration isroutine and within the knowledge of a person skilled in the art.

[0034] Although the circuitry shown in FIG. 3 shows separate blocks forthe command interpreter 302, the address generator 304, the CID RAM 306,and the output register 308, persons skilled in the art will recognizethat one may employ other circuit arrangements to accomplish the sameoverall function. For example, the CID RAM 306 may include the functionsof the address generator 304. Likewise, the CID RAM 306 may incorporatethe functions of the output register 308. Alternatively, the commandinterpreter 302 may include the functions of the address generator 304.These alternative arrangements accomplish the same overall functions asthe embodiment 300 described in detail above.

[0035] One aspect of the invention contemplates incorporating thefunctions of the command interpreter 302, the address generator 304, theCID RAM 306, and the output register 308 in a single integrated circuitdevice. Persons skilled in the art, however, will recognize that one mayinclude one or more of the above circuits in separate discretecircuitry, modules, integrated circuits, or combinations of thosedevices. Moreover, one may group some of the functions in one integratedcircuit device and group the remaining functions in one or moreintegrated circuit devices. For example, one integrated circuit devicemay include the command interpreter 302 and the address generator 304and a second integrated circuit device may include the CID RAM 306 andthe output register 308, as desired.

[0036] In the embodiment 300 shown in FIG. 3, the address pointer 326and the address output 328 each comprise 6 bits. Furthermore, the dataoutput 332 of the CID RAM 306 and the data output 350 of the outputregister 308 each comprise 16 bits. A person skilled in the art,however, will appreciate that one may readily use other data- andaddress-word widths by varying the circuit (e.g., by adding or removingelements or by changing the number of the input lines, the number of theoutput lines, or both).

[0037] Further modifications and alternative embodiments of thisinvention will be apparent to those skilled in the art in view of thisdescription of the invention. Accordingly, this description teachesthose skilled in the art the manner of carrying out the invention andare to be construed as illustrative only. The forms of the inventionshown and described constitute the presently preferred embodiments.Persons skilled in the art may make various changes in the shape, sizeand arrangement of parts. For example, persons skilled in the art maysubstitute equivalent elements for the elements illustrated anddescribed here. Moreover, persons skilled in the art after having thebenefit of this description of the invention may use certain features ofthe invention independently of the use of other features, withoutdeparting from the scope of the invention.

I claim:
 1. Direct-access-arrangement (DAA) circuitry configured tooperate within the AC-97 operational specifications, comprising:interface circuitry configured to receive input data and to provideoutput data, the interface circuitry further configured to operatewithin the AC-97 operational specifications; and Caller IDdata-reporting circuitry coupled to the interface circuitry, the CallerID data-reporting circuitry configured to provide Caller ID data to theinterface circuitry asynchronously.
 2. Direct-access-arrangementcircuitry according to claim 1, in which the Caller ID data-reportingcircuitry provides the Caller ID data in one-word increments atnon-pre-determined intervals.
 3. Direct-access-arrangement circuitryaccording to claim 2, in which the interface circuitry resides within anintegrated circuit device.
 4. Direct-access-arrangement circuitryaccording to claim 3, in which the Caller ID data-reporting circuitryresides within the integrated circuit device. 5.Direct-access-arrangement circuitry according to claim 1, in which theCaller ID data-reporting circuitry further comprises: an output registerconfigured to receive input data and to provide output data to theinterface circuitry; and a random-access memory having a plurality ofaddress input lines and a plurality of data output lines, therandom-access memory configured to store and provide Caller ID data, thedata output lines of the random-access memory configured to provideCaller ID data to the output register.
 6. Direct-access-arrangementcircuitry according to claim 5, in which the Caller ID data-reportingcircuitry further comprises: an address generator having aninitialization input, and a plurality of address lines coupled to theaddress input lines of the random-access memory, the address generatorconfigured to initialize its address lines in response to aninitialization signal provided to the initialization input; and acommand interpreter coupled to the address generator, the commandinterpreter configured to accept a command, decode the command, andprovide an initialization signal and an increment control signal to theaddress generator.
 7. An integrated circuit device configured to operatewithin the AC-97 operational specifications, comprising: interfacecircuitry within the integrated circuit device configured to receiveinput data and to provide output data, the interface circuitry furtherconfigured to operate within the AC-97 operational specifications; andCaller ID data-reporting circuitry within the integrated circuit device,the Caller ID data-reporting circuitry coupled to the interfacecircuitry, the Caller ID data-reporting circuitry configured to provideCaller ID data to the interface circuitry asynchronously in one-wordincrements.
 8. The integrated circuit device according to claim 7, inwhich the Caller ID data-reporting circuitry provides the Caller ID dataat non-pre-determined intervals.
 9. The integrated circuit deviceaccording to claim 7, in which the Caller ID data-reporting circuitryfurther comprises: an output register configured to receive input dataand to provide output data to the interface circuitry; and arandom-access memory having a plurality of address input lines and aplurality of data output lines, the random-access memory configured tostore and provide Caller ID data, the data output lines of therandom-access memory configured to provide Caller ID data to the outputregister.
 10. The integrated circuit device according to claim 9, inwhich the Caller ID data-reporting circuitry further comprises: anaddress generator having an initialization input, and a plurality ofaddress lines coupled to the address input lines of the random-accessmemory, the address generator configured to initialize its address linesin response to an initialization signal provided to the initializationinput; and a command interpreter coupled to the address generator, thecommand interpreter configured to accept a command, decode the command,and provide an initialization signal and an increment control signal tothe address generator.
 11. A device configured to operate within theAC-97 operational specifications, comprising: means for interfacing toan AC-97 compliant device configured to receive input data and toprovide output data, the means for interfacing to an AC-97 compliantdevice further configured to operate within the AC-97 operationalspecifications; and means for reporting Caller ED data, the means forreporting Caller ID data coupled to the means for interfacing to anAC-97 compliant device, the means for reporting Caller ID dataconfigured to asynchronously provide Caller ID data to the means forinterfacing to an AC-97 compliant device.
 12. The device according toclaim 11, in which the means for reporting Caller ID data provides theCaller ID data in non-pre-determined intervals.
 13. The device accordingto claim 12, in which the means for interfacing to an AC-97 compliantdevice resides within an integrated circuit device.
 14. The deviceaccording to claim 13, in which the means for reporting Caller ID dataresides within the integrated circuit.
 15. The device according to claim11, in which the means for reporting Caller ID data further comprises: ameans for registering data, configured to receive input data and toprovide output data to the means for interfacing to an AC-97 compliantdevice; and means for storing Caller ID data, the means for storingCaller ID data having a plurality of address input lines and a pluralityof data output lines, the means for storing Caller ID data configured tostore and provide Caller ID data to the means for registering data. 16.The device according to claim 15, in which the means for reportingCaller ID data further comprises: means for generating addresses, themeans for generating addresses having an initialization input and aplurality of address lines coupled to the address input lines of themeans for storing Caller ID data, the means for generating addressesconfigured to initialize its address lines in response to aninitialization signal provided to the initialization input; and meansfor interpreting commands, coupled to the means for generatingaddresses, the means for interpreting commands configured to accept acommand, decode the command, and provide an initialization signal and anincrement control signal to the means for generating addresses.
 17. Acomputer system having direct-access-arrangement (DAA) circuitryconfigured to couple the computer system to data lines, comprising: aprocessor configured to process data and to decode and processinstructions; a controller coupled to the processor, the controllerconfigured to operate within the AC-97 operational specifications;direct-access-arrangement circuitry coupled to the controller andconfigured to operate within the AC-97 operational specifications, thedirect-access-arrangement circuitry further configured to provide datato the controller and to receive data from the controller; and Caller IDdata-reporting circuitry coupled to the direct-access-arrangementcircuitry, the Caller ID data-reporting circuitry configured to provideCaller ID data to the direct-access-arrangement circuitry asynchronouslyin one-word increments.
 18. The computer system according to claim 17,in which the Caller ID data-reporting circuitry provides the Caller IDdata at non-pre-determined intervals.
 19. The computer system accordingto claim 18, in which the interface circuitry resides within anintegrated circuit device.
 20. The computer system according to claim19, in which the Caller ID data-reporting circuitry resides within theintegrated circuit device.
 21. The computer system according to claim17, in which the Caller ID data-reporting circuitry further comprises:an output register configured to receive input data and to provideoutput data to the direct-access-arrangement circuitry; and arandom-access memory having a plurality of address input lines and aplurality of data output lines, the random-access memory configured tostore and provide Caller ID data, the data output lines of therandom-access memory configured to provide Caller ID data to the outputregister.
 22. The computer system according to claim 21, in which theCaller ID data-reporting circuitry further comprises: an addressgenerator having an initialization input, and a plurality of addresslines coupled to the address input lines of the random-access memory,the address generator configured to initialize its address lines inresponse to an initialization signal provided to the initializationinput; and a command interpreter coupled to the address generator, thecommand interpreter configured to accept a command, decode the command,and provide an initialization signal and an increment control signal tothe address generator.
 23. A computer system including circuitryconfigured to operate within the AC-97 operational specifications,comprising: a controller configured to operate within the AC-97operational specifications; an integrated circuit device, coupled to thecontroller, and configured to operate within the AC-97 operationalspecifications, the integrated circuit device further configured toprovide data to the controller; and Caller ID data-reporting circuitryincluded within the integrated circuit device, the Caller IDdata-reporting circuitry configured to receive Caller ID data and toprovide Caller ID data to the controller asynchronously.
 24. Thecomputer system according to claim 23, in which the Caller IDdata-reporting circuitry provides Caller ID data to the controller inone-word increments at non-pre-determined intervals.
 25. The computersystem according to claim 24, in which the Caller ID data-reportingcircuitry further comprises: an output register configured to receiveCaller ID data and to provide Caller ID data; and a random-access memoryhaving a plurality of address input lines and a plurality of data outputlines, the random-access memory configured to store and provide CallerID data, the data output lines of the random-access memory configured toprovide Caller ID data to the output register.
 26. The computer systemaccording to claim 25, in which the Caller ID data-reporting circuitryfurther comprises: an address generator having an initialization input,and a plurality of address lines coupled to the address input lines ofthe random-access memory, the address generator configured to initializeits address lines in response to an initialization signal provided tothe initialization input; and a command interpreter coupled to theaddress generator, the command interpreter configured to accept acommand, decode the command, and provide an initialization signal and anincrement control signal to the address generator.
 27. A method forreporting Caller ID data in a computer system, comprising: providing ahost processor configured to process data and to decode and processinstructions; providing direct-access-arrangement (DAA) circuitryconfigured to operate within the AC-97 operational specifications, thedirect-access-arrangement circuitry including Caller ID data-reportingcircuitry configured to provide Caller ID data asynchronously inone-word increments; receiving Caller ID data in the Caller IDdata-reporting circuitry; and providing the Caller ID data to the hostprocessor.
 28. The method according to claim 27, in which the Caller IDdata-reporting circuitry in the step of providingdirect-access-arrangement circuitry provides the Caller ID data inone-word increments at non-pre-determined intervals.
 29. The methodaccording to claim 28, in which the direct-access-arrangement circuitryin the step of providing the host-side direct-access-arrangementcircuitry resides in an integrated circuit device.
 30. The methodaccording to claim 27, in which the step of providing the host-sidedirect-access-arrangement circuitry further comprises: providing anoutput register configured to receive Caller ID data and to provideCaller ID data; and providing a random-access memory within the CallerID data-reporting circuitry, the random-access memory configured toreceive an address and to provide Caller ID data stored at the addressto the output register.
 31. The method according to claim 30, in whichthe step of providing the host-side direct-access-arrangement circuitryfurther comprises: providing an address generator within the Caller IDdata-reporting circuitry, the address generator configured to provide anaddress to the random-access memory in response to an initializationsignal; and providing a command interpreter within the Caller IDdata-reporting circuitry, the command interpreter configured to receivean input command, decode the input command, and provide aninitialization signal and an increment control signal to the addressgenerator.
 32. A method for reporting Caller ID data, comprising:providing direct-access-arrangement (DAA) circuitry configured tooperate within the AC-97 operational specifications, thedirect-access-arrangement circuitry including Caller ID data-reportingcircuitry, the Caller ID data-reporting circuitry configured to receiveCaller ID data and to provide Caller ID data asynchronously; receivingCaller ID data in the Caller-ID data-reporting circuitry; and providingthe Caller ID data to a device.
 33. The method according to claim 32, inwhich the Caller ID data-reporting circuitry in the step of providingdirect-access-arrangement circuitry provides the Caller ID data inone-word increments at non-pre-determined intervals.
 34. The methodaccording to claim 33, in which the direct-access-arrangement circuitryin the step of providing the host-side direct-access-arrangementcircuitry resides in an integrated circuit device.
 35. The methodaccording to claim 33, in which the step of providing the host-sidedirect-access-arrangement circuitry further comprises: providing anoutput register configured to receive Caller ID data and to provideCaller ID data; and providing a random-access memory within the CallerID data-reporting circuitry, the random-access memory configured toreceive an address and to provide Caller ID data stored at the addressto the output register.
 36. The method according to claim 35, in whichthe step of providing the host-side direct-access-arrangement circuitryfurther comprises: providing an address generator within the Caller IDdata-reporting circuitry, the address generator configured to provide anaddress to the random-access memory in response to an initializationsignal; and providing a command interpreter within the Caller IDdata-reporting circuitry, the command interpreter configured to receivean input command, decode the input command, and provide aninitialization signal and an increment control signal to the addressgenerator.
 37. The method according to claim 36, in which the device inthe step of providing the Caller ID data comprises a host processor. 38.The method according to claim 36, in which the device in the step ofproviding the Caller ID data comprises a controller configured tooperate within the AC-97 operational specifications.